A phase locked loop (PLL) for some applications, e.g., a high speed serializer-deserializer or an optical link transceiver, needs to have a low jitter. A random jitter in the PLL mainly comes from a voltage controlled oscillator (VCO). On the other hand, the charge pump coupled to the VCO in the PLL is one of the major sources of a deterministic jitter. A PLL circuit and/or method with reduced jitter are desired.